Logic Design of NanoICS 1st Edition by Svetlana Yanushkevich, Vlad Shmerko, Sergey Edward Lyshevski ISBN 9780849327667, 0849327660

Logic Design of NanoICS 1st Edition by Svetlana N. Yanushkevich, Vlad P. Shmerko, Sergey Edward Lyshevski – Ebook PDF Instant Download/Delivery:  9780849327667, 0849327660
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Product details: 

ISBN 10: 0849327660

ISBN 13:  9780849327667

Author: Svetlana N. Yanushkevich, Vlad P. Shmerko, Sergey Edward Lyshevski

Today’s engineers will confront the challenge of a new computing paradigm, relying on micro- and nanoscale devices. Logic Design of NanoICs builds a foundation for logic in nanodimensions and guides you in the design and analysis of nanoICs using CAD. The authors present data structures developed toward applications rather than a purely theoretical treatment.

Requiring only basic logic and circuits background, Logic Design of NanoICs draws connections between traditional approaches to design and modern design in nanodimensions. The book begins with an introduction to the directions and basic methodology of logic design at the nanoscale, then proceeds to nanotechnologies and CAD, graphical representation of switching functions and networks, word-level and linear word-level data structures, 3-D topologies based on hypercubes, multilevel circuit design, and fault-tolerant computation in hypercube-like structures. The authors propose design solutions and techniques, going beyond the underlying technology to provide more applied knowledge.

This design-oriented reference is written for engineers interested in developing the next generation of integrated circuitry, illustrating the discussion with approximately 250 figures and tables, 100 equations, 250 practical examples, and 100 problems. Each chapter concludes with a summary, references, and a suggested reading section.

Table of contents: 

1. Progress From Micro- to Nanoelectronics
2. Logic Design in Spatial Dimensions
3. Towards Computer-Aided Design of NanoICs
4. Methodology
5. Example: Hypercube Structure of Hierarchical FPGA
6. Summary
7. Problems
8. Further Reading
9. References

10. NANOTECHNOLOGIES
11. Nanotechnologies
12. Nanoelectronic Devices
13. Digital Nanoscale Circuits: Gates vs. Arrays
14. Molecular Electronics
15. Scaling and Fabrication
16. Summary
17. Problems
18. Further Reading
19. References

20. BASICS OF LOGIC DESIGN IN NANOSPACE
21. Graphs
22. Data Structures for Switching Functions
23. Sum-of-Products Expressions
24. Shannon Decision Trees and Diagrams
25. Reed-Muller Expressions
26. Decision Trees and Diagrams
27. Arithmetic Expressions
28. Decision Trees and Diagrams
29. Summary
30. Problems
31. Further Reading
32. References

33. WORD-LEVEL DATA STRUCTURES
34. Word-level Data Structures
35. Word-level Arithmetic Expressions
36. Word-level Sum-of-Products Expressions
37. Word-level Reed-Muller Expressions
38. Summary
39. Problems
40. Further Reading
41. References

42. NANOSPACE AND HYPERCUBE-LIKE DATA STRUCTURES
43. Spatial Structures
44. Hypercube Data Structure
45. Assembling of Hypercubes
46. N-Hypercube Definition
47. Degree of Freedom and Rotation
48. Coordinate Description
49. N-Hypercube Design for n > 3 Dimensions
50. Embedding a Binary Decision Tree in N-Hypercube
51. Assembling
52. Spatial Topological Measurements
53. Summary
54. Problems
55. Further Reading
56. References

57. NANODIMENSIONAL MULTILEVEL CIRCUITS
58. Graph-Based Models in Logic Design of Multilevel Networks
59. Library of N-Hypercubes for Elementary Logic Functions
60. Hybrid Design Paradigm: N-Hypercube and DAG
61. Manipulation of N-Hypercubes
62. Numerical Evaluation of 3-D Structures
63. Summary
64. Further Reading
65. References

66. LINEAR WORD-LEVEL MODELS OF MULTILEVEL CIRCUITS
67. Linear Expressions
68. Linear Arithmetic Expressions
69. Linear Arithmetic Expressions of Elementary Functions
70. Linear Decision Diagrams
71. Representation of a Circuit Level by Linear Expression
72. Linear Decision Diagrams for Circuit Representation
73. Technique for Manipulating the Coefficients
74. Linear Word-level Sum-of-Products Expressions
75. Linear Word-level Reed-Muller Expressions
76. Summary
77. Problems
78. Further Reading
79. References

80. EVENT-DRIVEN ANALYSIS OF HYPERCUBE-LIKE TOPOLOGY
81. Formal Definition of Change in a Binary System
82. Computing Boolean Differences
83. Models of Logic Networks in Terms of Change
84. Matrix Models of Change
85. Models of Directed Changes in Algebraic Form
86. Local Computation Via Partial Boolean Difference
87. Generating Reed-Muller Expressions by Logic Taylor Series
88. Arithmetic Analogs of Boolean Differences and Logic Taylor Expansion
89. Summary
90. Problems
91. Further Reading
92. References

93. NANODIMENSIONAL MULTIVALUED CIRCUITS
94. Introduction to Multivalued Logic
95. Spectral Technique
96. Multivalued Decision Trees and Decision Diagrams
97. Concept of Change in Multivalued Circuits
98. Generation of Reed-Muller Expressions
99. Linear Word-level Expressions of Multivalued Functions
100. Linear Nonarithmetic Word-level Representation of Multivalued Functions
101. Summary
102. Problems
103. Further Reading
104. References

105. PARALLEL COMPUTATION IN NANOSPACE
106. Data Structures and Massive Parallel Computing
107. Arrays
108. Linear Systolic Arrays for Computing Logic Functions
109. Computing Reed-Muller Expressions
110. Computing Boolean Differences
111. Computing Arithmetic Expressions
112. Computing Walsh Expressions
113. Tree-Based Network for Manipulating a Switching Function
114. Hypercube Arrays
115. Summary
116. Problems
117. Further Reading
118. References

119. FAULT-TOLERANT COMPUTATION
120. Definitions
121. Probabilistic Behavior of Nanodevices
122. Neural Networks
123. Stochastic Computing
124. Von Neumann’s Model on Reliable Computation with Unreliable Components
125. Faulty Hypercube-Like Computing Structures
126. Summary
127. Further Reading
128. References

129. INFORMATION MEASURES IN NANODIMENSIONS
130. Information-Theoretical Measures at Various Levels of Design in Nanodimensions
131. Information-Theoretical Measures in Logic Design
132. Information Measures of Elementary Switching Functions
133. Information-Theoretical Measures in Decision Trees
134. Information Measures in the N-Hypercube
135. Information-Theoretical Measures in Multivalued Functions
136. Summary
137. Problems
138. Further Reading
139. References

 

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Tags: Svetlana Yanushkevich, VladShmerko, Sergey Edward Lyshevski, Logic Design