Introduction to Simulink with Engineering Applications 2nd Edition by Steven T. Karris – Ebook PDF Instant Download/Delivery: 1934404098, 978-1934404096
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Product details:
ISBN 10: 1934404098
ISBN 13: 978-1934404096
Author: Steven T. Karris
Table of contents:
1 Introduction to Simulink
1.1 Simulink and its Relation to MATLAB..
1.2 Simulink Demos
1.3 Summary.
1.4 Exercises
1.5 Solutions to End-of-Chapter Exercises.
2 The Commonly Used Blocks Library
2.1 Inport, Outport, and Subsystem Blocks
2.2 Ground Block
2.3 Terminator Block
2.4 Constant and Product Blocks
2.5 Scope Block
2.6 Bus Creator and Bus Selector Blocks
2.7 Mux and Demux Blocks
2.8 Switch Block
2.9 Sum Block
2.10 Gain Block
2.11 Relational Operator Block
2.12 Logical Operator Block
2.13 Saturation Block
2.14 Integrator Block
2.15 Unit Delay Block
2.16 Discrete-Time Integrator Block
2.17 Data Types and The Data Type Conversion Block
2.18 Summary
2.19 Exercises
2.20 Solutions to End-of-Chapter Exercises
3 The Continuous Blocks Library
3.1 Continuous-Time Linear Systems Sub-Library
3.1.1 Integrator Block
3.1.2 Derivative Block..
3.1.3 State-Space Block.
3.1.4 Transfer Fcn Block
3.1.5 Zero-Pole Block.
3.2 Continuous-Time Delays Sub-Library
3.2.1 Transport Delay Block…
3.2.2 Variable Time Delay Block
3.2.3 Variable Transport Delay Block.
3.3 Summary.
3.4 Exercises.
3.5 Solutions to End-of-Chapter Exercises.
4 The Discontinuities Blocks Library
4.1 Saturation Block.
4.2 Saturation Dynamic Block
4.3 Dead Zone Block
4.4 Dead Zone Dynamic Block.
4.5 Rate Limiter Block.
4.6 Rate Limiter Dynamic Block.
4.7 Backlash Block.
4.8 Relay Block
4.9 Quantizer Block.
4.10 Hit Crossing Block.
4.11 Coulomb and Viscous Friction Block.
4.12 Wrap to Zero Block
4.13 Summary
4.14 Exercises
4.15 Solutions to End-of-Chapter Exercises.
5 The Discrete Blocks Library
5.1 Discrete-Time Linear Systems Sub-Library.
5.1.1 Unit Delay Block.
5.1.2 Integer Delay Block.
5.1.3 Tapped Delay Block.
5.1.4 Discrete-Time Integrator Block.
5.1.5 Discrete Transfer Fcn Block
5.1.6 Discrete Filter Block
5.1.7 Discrete Zero-Pole Block.
5.1.8 Difference Block
5.1.9 Discrete Derivative Block.
5.1.10 Discrete State-Space Block.
5.1.11 Transfer Fcn First Order Block.
5.1.12 Transfer Fcn Lead or Lag Block.
5.1.13 Transfer Fcn Real Zero Block
5.1.14 Discrete FIR Filter Block
5.2 Sample & Hold Delays Sub-Library.
5.2.1 Memory Block
5.2.2 First-Order Hold Block.
5.2.3 Zero-Order Hold Block..
5.3 Summary.
5.4 Exercises
5.5 Solutions to End-of-Chapter Exercises
6 The Logic and Bit Operations Library
6.1 Logic Operations Group Sub-Library
6.1.1 Logical Operator Block
6.1.2 Relational Operator Block..
6.1.3 Interval Test Block.
6.1.4 Interval Test Dynamic Block
6.1.5 Combinatorial Logic Block..
6.1.6 Compare to Zero Block
6.1.7 Compare to Constant Block.
6.2 Bit Operations Group Sub-Library.
6.2.1 Bit Set Block.
6.2.2 Bit Clear Block
6.2.3 Bitwise Operator Block.
6.2.4 Shift Arithmetic Block
6.2.5 Extract Bits Block..
6.3 Edge Detection Group Sub-Library.
6.3.1 Detect Increase Block.
6.3.2 Detect Decrease Block
6.3.3 Detect Change Block
6.3.4 Detect Rise Positive Block
6.3.5 Detect Rise Nonnegative Block.
6.3.6 Detect Fall Negative Block
6.3.7 Detect Fall Nonpositive Block.
6.4 Summary.
6.5 Exercises
6.6 Solutions to End-of-Chapter Exercises.
7 The Lookup Tables Library
7.1 Lookup Table Block
7.2 Lookup Table (2-D) Block
7.3 Lookup Table (n-D) Block.
7.4 PreLookup Index Search Block.
7.5 Interpolation (n-D) Using PreLookup Block.
7.6 Direct Lookup Table (n-D) Block.
7.7 Lookup Table Dynamic Block.
7.8 Sine and Cosine Blocks
7.9 Summary.
7.10 Exercises…
7.11 Solutions to End-of-Chapter Exercises.
8 The Math Operations Library
8.1 Math Operations Group Sub-Library
8.1.1 Sum Block
8.1.2 Add Block
8.1.3 Subtract Block…
8.1.4 Sum of Elements Block
8.1.5 Bias Block.
8.1.6 Weighted Sample Time Math Block
8.1.7 Gain Block
8.1.8 Slider Gain Block
8.1.9 Product Block.
8.1.10 Divide Block.
8.1.11 Product of Elements Block.
8.1.12 Dot Product Block
8.1.13 Sign Block
8.1.14 Abs Block.
8.1.15 Unary Minus Block
8.1.16 Math Function Block.
8.1.17 Rounding Function Block.
8.1.18 Polynomial Block
8.1.19 MinMax Block
8.1.20 MinMax Running Resettable Block
8.1.21 Trigonometric Function Block
8.1.22 Sine Wave Function Block
8.1.23 Algebraic Constraint Block….
8.2 Vector / Matrix Operations Group Sub-Library.
8.2.1 The Assignment Block.
8.2.2 The Reshape Block
8.2.3 The Squeze Block
8.2.4 The Matrix Concatenate Block.
8.2.5 The Vector Concatenate Block.
8.2.6 The Permute Block
8.3 The Complex Vector Conversions Group Sub-Library.
8.3.1 Complex to Magnitude-Angle Block.
8.3.2 Magnitude-Angle to Complex Block.
8.3.3 Complex to Real-Imag Block
8.3.4 Real-Imag to Complex Block.
8.4 Summary.
8.5 Exercises
8.6 Solutions to End-of-Chapter Exercises.
9 The Model Verification Library
9.1 Check Static Lower Bound Block.
9.2 Check Static Upper Bound Block.
9.3 Check Static Range Block
9.4 Check Static Gap Block…
9.5 Check Dynamic Lower Bound Block
9.6 Check Dynamic Upper Bound Block.
9.7 Check Dynamic Range Block.
9.8 Check Dynamic Gap Block
9.9 Assertion Block.
9.10 Check Discrete Gradient Block.
9.11 Check Input Resolution Block
9.12 Summary
9.13 Exercises..
9.14 Solutions to End-of-Chapter Exercises
10 The Model-Wide Utilities Library
10.1 Linearization of Running Models Sub-Library.
10.1.1 Trigger-Based Linearization Block
10.1.2 Time-Based Linearization Block..
10.2 Documentation Sub-Library.
10.2.1 Model Info Block.
10.2.2 Doc Text Block
10.3 Modeling Guides Sub-Library
Block Support Table Block.
10.4 Summary
11 The Ports & Subsystems Library
11.1 Inport, Outport, and Subsystem Blocks.
11.2 Trigger Block
11.3 Enable Block.
11.4 Function-Call Generator Block.
11.5 Atomic Subsystem Block.
11.6 Code Reuse Subsystem Block
11.7 Model Block.
11.8 Configurable Subsystem Block..
11.9 Triggered Subsystem Block.
11.10 Enabled Subsystem Block.
11.11 Enabled and Triggered Subsystem Block.
11.12 Function-Call Subsystem Block
11.13 For Iterator Subsystem Block.
11.14 While Iterator Subsystem Block..
11.15 If and If Action Subsystem Blocks.
11.16 Switch Case and The Switch Case Action Subsystem Blocks.
11.17 Subsystem Examples Block
11.18 S-Functions in Simulink.
11.19 Summary
12 The Signal Attributes Library
12.1 Signal Attribute Manipulation Sub-Library.
12.1.1 Data Type Conversion Block
12.1.2 Data Type Duplicate Block.
12.1.3 Data Type Propagation Block
12.1.4 Data Type Scaling Strip Block.
12.1.5 Data Conversion Inherited Block
12.1.6 IC (Initial Condition) Block.
12.1.7 Signal Conversion Block
12.1.8 Rate Transition Block
12.1.9 Signal Specification Block.
12.1.10 Bus to Vector Block.
12.1.11 Data Type Propagation Examples Block.
12.2 Signal Attribute Detection Sub-Library.
12.2.1 Probe Block..
12.2.2 Weighted Sample Time Block.
12.2.3 Width Block
12.3 Summary
13 The Signal Routing Library
13.1 Signal Routing Group Sub-Library.
13.1.1 Bus Creator Block
13.1.2 Bus Selector Block
13.1.3 Bus Assignment Block.
13.1.4 Mux Block
13.1.5 Demux Block
13.1.6 Selector Block..
13.1.7 Index Vector Block.
13.1.8 Merge Block.
13.1.9 Environmental Controller Block.
13.1.10 Manual Switch Block
13.1.11 Multiport Switch Block
13.1.12 Switch Block..
13.1.13 From Block
13.1.14 Goto Tag Visibility Block
13.1.15 Goto Block.
13.2 Signal Storage and Access Group Sub-Library
13.2.1 Data Store Read Block
13.2.2 Data Store Memory Block.
13.2.3 Data Store Write Block.
13.3 Summary
14 The Sinks Library
14.1 Models and Subsystems Outputs Sub-Library.
14.1.1 Outport Block.
14.1.2 Terminator Block
14.1.3 To File Block.
14.1.4 To Workspace Block
14.2 Data Viewers Sub-Library.
14.2.1 Scope Block
14.2.2 Floating Scope Block
14.2.3 XY Graph Block.
14.2.4 Display Block
14.3 Simulation Control Sub-Library
Stop Simulation Block.
14.4 Summary
15 The Sources Library
15.1 Models and Subsystems Inputs Sub-Library
15.1.1 Inport Block
15.1.2 Ground Block.
15.1.3 From File Block..
15.1.4 From Workspace Block
15.2 Signal Generators Sub-Library
15.2.1 Constant Block
15.2.2 Signal Generator Block.
15.2.3 Pulse Generator Block
15.2.4 Signal Builder Block..
15.2.5 Ramp Block.
15.2.6 Sine Wave Block.
15.2.7 Step Block..
15.2.8 Repeating Sequence Block.
15.2.9 Chirp Signal Block.
15.2.10 Random Number Block.
15.2.11 Uniform Random Number Block
15.2.12 Band Limited White Noise Block.
15.2.13 Repeating Sequence Stair Block.
15.2.14 Repeating Sequence Interpolated Block
15.2.15 Counter Free-Running Block
15.2.16 Counter Limited Block
15.2.17 Clock Block..
15.2.18 Digital Clock Block.
15.3 Summary.
16 The User-Defined Functions Library
16.1 Fen Block.
16.2 MATLAB Fen Block.
16.3 Embedded MATLAB Function Block
16.4 S-Function Block.
16.5 Level-2 M-file S-Function Block.
16.6 S-Function Builder Block
16.7 S-Function Examples Block..
16.8 Summary.
17 The Additional Discrete Library
17.1 Transfer Fcn Direct Form II Block.
17.2 Transfer Fcn Direct Form II Time Varying Block.
17.3 Fixed-Point State-Space Block.
17.4 Unit Delay External IC Block.
17.5 Unit Delay Resettable Block
17.6 Unit Delay Resettable External IC Block.
17.7 Unit Delay Enabled Block
17.8 Unit Delay Enabled Resettable Block
17.9 Unit Delay Enabled External IC Block.
17.10 Unit Delay Enabled Resettable External IC Block.
17.11 Unit Delay With Preview Resettable Block..
17.12 Unit Delay With Preview Resettable External RV Block
17.13 Unit Delay With Preview Enabled Block
17.14 Unit Delay With Preview Enabled Resettable Block….
17.15 Unit Delay With Preview Enabled Resettable External RV Block
17.16 Summary
18 The Additional Math Increment / Decrement Library
18.1 Increment Real World Block.
18.2 Decrement Real World Block
18.3 Increment Stored Integer Block
18.4 Decrement Stored Integer Block.
18.5 Decrement to Zero Block
18.6 Decrement Time To Zero Block.
18.7 Summary.
19 The Simulink Extras Library
19.1 Additional Discrete Group blocks.
19.1.1 Discrete Transfer Fcn (with initial states) block.
19.1.2 Discrete Transfer Fcn (with initial outputs) block..
19.1.3 Discrete Zero-Pole (with initial states) block
19.1.4 Discrete Zero-Pole (with initial outputs) block.
19.1.5 Idealized ADC Quantizer block
19.2 Additional Linear Group blocks.
19.2.1 Transfer Fcn (with initial states) block
19.2.2 Transfer Fcn (with initial outputs) block
19.2.3 Zero-Pole (with initial states) block….
19.2.4 Zero-Pole (with initial outputs) block
19.2.5 State-Space (with initial outputs) block.
19.2.6 PID Controller block
19.2.7 PID Controller (with Approximate Derivative) block.
19.3 Additional Sinks Group blocks..
19.3.1 Power Spectral Density block
19.3.2 Averaging Power Spectral Density block
19.3.3 Spectrum Analyzer block..
19.3.4 Averaging Spectrum Analyzer block.
19.3.5 Cross Correlator block
19.3.6 Auto Correlator block…
19.3.7 Floating Bar Plot block
19.4 Flip Flops Group blocks..
19.4.1 Clock block
19.4.2 D Latch block..
19.4.3 S-R Flip Flop block.
19.4.4 D Flip Flop block..
19.4.5 J-K Flip Flop block.
19.5 Linearization Group blocks
19.5.1 Switched Derivative for Linearization block.
19.5.2 Switched Transport Delay for Linearization block..
19.6 Transformations Group blocks..
19.6.1 Polar to Cartesian block
19.6.2 Cartesian to Polar block
19.6.3 Spherical to Cartesian block.
19.6.4 Cartesian to Spherical block.
19.6.5 Fahrenheit to Celsius block.
19.6.6 Celsius to Fahrenheit block.
19.6.7 Degrees to Radians block
19.6.8 Radians to Degrees block
19.7 Summary.
20 Engineering Applications
20.1 Applications to Differential Equations
20.1.1 Math Example
20.1.2 Dynamics Example
20.1.3 Chemical Solutions Example
20.1.4 Heat Flow Example
20.1.5 Cantilever Beam Deflection Example
20.1.6 Tractrix Curve Example
20.1.7 Bessel Differential Equation Example
20.1.8 Van der Pol Differential Equation Example
20.1.9 The Simple Pendulum Example
20.1.10 Simple Oscillator Example
20.2 Zero-Order Hold and First-Order Hold Circuits as Reconstructors
20.3 Digital Filter Realization Forms
20.3.1 Direct Form I Realization of a Digital Filter
20.3.2 Direct Form II Realization of a Digital Filter
20.3.3 Series Form Realization of a Digital Filter
20.3.4 Parallel Form Realization of a Digital Filter
20.4 Models for Binary Counters
20.4.1 Model for a 3-bit Up/Down Counter
20.4.2 Model for a 4-bit Ring Counter
20.5 Models for Mechanical Systems
20.5.1 Model for a Mass-Spring-Dashpot
20.5.2 Model for a Cascaded Mass-Spring System
20.5.3 Model for a Mechanical Accelerometer
20.6 Feedback Control Systems
20.7 Models for Electrical Systems
20.7.1 Model for an Electric Circuit in Phasor Form
20.7.2 Model for the Application of the Superposition Principle
20.8 Transformations
20.9 Discrete Time Integration with Variable Amplitude Input
20.10 The Digital Filter Design Block
20.11 S-Function Examples
20.11.1 Temperature Coefficients for Semiconductor Diodes
20.11.2 Simple Pendulum
20.12 Concluding Remarks
20.13 Summary
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