Digital Systems Principles and Applications 10th Edition by Ronald Tocci, Neal Widmer, Gregory Moss ISBN 0131739697 9180131739697

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Product details: 

ISBN 10:  0131739697 

ISBN 13:  9180131739697

Author: Ronald J. Tocci, Neal S. Widmer, Gregory L. Moss

Digital Systems: Principles and Applications (10th Edition) by Ronald J. Tocci, Neal S. Widmer, and Gregory L. Moss is a comprehensive textbook that introduces the principles and techniques of modern digital systems. It is designed for students in two- and four-year programs in technology, engineering, and computer science, and serves as both an instructional guide and a reference for digital electronics.​

Table of contents: 

CHAPTER 1: Introductory Concepts

1. Numerical Representations

2. Digital and Analog Systems

3. Digital Number Systems

4. Representing Binary Quantities

5. Digital Circuits/Logic Circuits

6. Parallel and Serial Transmission

7. Memory

8. Digital Computers

CHAPTER 2: Number Systems and Codes
9. Binary-to-Decimal Conversions
10. Decimal-to-Binary Conversions
11. Octal Number System
12. Hexadecimal Number System
13. BCD Code
14. Putting It All Together
15. The Byte, Nibble, and Word
16. Alphanumeric Codes
17. Parity Method for Error Detection
18. Applications

CHAPTER 3: Describing Logic Circuits
19. Boolean Constants and Variables
20. Truth Tables
21. OR Operation with OR Gates
22. AND Operation with AND Gates
23. NOT Operation
24. Describing Logic Circuits Algebraically
25. Evaluating Logic-Circuit Outputs
26. Implementing Circuits from Boolean Expressions
27. NOR Gates and NAND Gates
28. Boolean Theorems
29. DeMorgan’s Theorems
30. Universality of NAND Gates and NOR Gates
31. Alternate Logic-Gate Representations
32. Which Gate Representation to Use
33. IEEE/ANSI Standard Logic Symbols
34. Summary of Methods to Describe Logic Circuits
35. Description Languages Versus Programming Languages
36. Implementing Logic Circuits with PLDs
37. HDL Format and Syntax
38. Intermediate Signals

CHAPTER 4: Combinational Logic Circuits
39. Sum-of-Products Form
40. Simplifying Logic Circuits
41. Algebraic Simplification
42. Designing Combinational Logic Circuits
43. Karnaugh Map Method
44. Exclusive-OR and Exclusive-NOR Circuits
45. Parity Generator and Checker
46. Enable/Disable Circuits
47. Basic Characteristics of Digital ICs
48. Troubleshooting Digital Systems
49. Internal Digital IC Faults
50. External Faults
51. Troubleshooting Case Study
52. Programmable Logic Devices
53. Representing Data in HDL
54. Truth Tables Using HDL
55. Decision Control Structures in HDL

CHAPTER 5: Flip-Flops and Related Devices
56. NAND Gate Latch
57. NOR Gate Latch
58. Troubleshooting Case Study
59. Clock Signals and Clocked Flip-Flops
60. Clocked S-C Flip-Flop
61. Clocked J-K Flip-Flop
62. Clocked D Flip-Flop
63. D Latch (Transparent Latch)
64. Asynchronous Inputs
65. IEEE/ANSI Symbols
66. Flip-Flop Timing Considerations
67. Potential Timing Problem in FF Circuits
68. Master/Slave Flip-Flops
69. Flip-Flop Applications
70. Flip-Flop Synchronization
71. Detecting an Input Sequence
72. Data Storage and Transfer
73. Serial Data Transfer: Shift Registers
74. Frequency Division and Counting
75. Microcomputer Application
76. Schmitt-Trigger Devices
77. One-Shot (Monostable Multivibrator)
78. Analyzing Sequential Circuits
79. Clock Generator Circuits
80. Troubleshooting Flip-Flop Circuits
81. Sequential Circuits Using HDL
82. Edge-Triggered Devices
83. HDL Circuits with Multiple Components

CHAPTER 6: Digital Arithmetic: Operations and Circuits
84. Binary Addition
85. Representing Signed Numbers
86. Addition in the 2’s-Complement System
87. Subtraction in the 2’s-Complement System
88. Multiplication of Binary Numbers
89. Binary Division
90. BCD Addition
91. Hexadecimal Arithmetic
92. Arithmetic Circuits
93. Parallel Binary Adder
94. Design of a Full Adder
95. Complete Parallel Adder with Registers
96. Carry Propagation
97. Integrated-Circuit Parallel Adder
98. 2’s-Complement System
99. BCD Adder
100. ALU Integrated Circuits
101. IEEE/ANSI Symbols
102. Troubleshooting Case Study
103. Using TTL Library Functions with HDL
104. Logical Operations on Bit Arrays
105. HDL Adders
106. Expanding the Bit Capacity of a Circuit

CHAPTER 7: Counters and Registers

PART 1
107. Asynchronous (Ripple) Counters
108. Counters with MOD Numbers < 2ⁿ
109. IC Asynchronous Counters
110. Asynchronous Down Counter
111. Propagation Delay in Ripple Counters
112. Synchronous (Parallel) Counters
113. Synchronous Down and Up/Down Counters
114. Presettable Counters
115. The 74ALS193/HC193
116. More on the IEEE/ANSI Dependency Notation
117. Decoding a Counter
118. Decoding Glitches
119. Cascading BCD Counters
120. Synchronous Counter Design
121. Basic Counters Using HDL
122. Full-Featured Counters in HDL
123. LPM Counters
124. State Machines

PART 2
125. Integrated-Circuit Registers
126. Parallel In/Parallel Out – The 74ALS174/74HC174
127. Serial In/Serial Out – The 4731B
128. Parallel In/Serial Out – The 74ALS165/74HC165
129. Serial In/Parallel Out – The 74ALS164/74HC164
130. IEEE/ANSI Register Symbols
131. Shift-Register Counters
132. Troubleshooting
133. HDL Registers
134. HDL Ring Counters
135. HDL One-Shots

CHAPTER 8: Integrated-Circuit Logic Families
136. Digital IC Terminology
137. The TTL Logic Family
138. TTL Data Sheets
139. TTL Series Characteristics
140. TTL Loading and Fan-Out
141. Other TTL Characteristics
142. MOS Technology
143. Digital MOSFET Circuits
144. Complementary MOS Logic
145. CMOS Series Characteristics
146. Low-Voltage Technology
147. Open-Collector/Open-Drain Outputs
148. Tristate (Three-State) Logic Outputs
149. High-Speed Bus Interface Logic
150. The ECL Digital IC Family
151. CMOS Transmission Gate (Bilateral Switch)
152. IC Interfacing
153. TTL Driving CMOS
154. CMOS Driving TTL
155. Analog Voltage Comparators
156. Troubleshooting

CHAPTER 9: MSI Logic Circuits
157. Decoders
158. BCD-to-7-Segment Decoder/Drivers
159. Liquid-Crystal Displays
160. Encoders
161. Troubleshooting
162. Multiplexers (Data Selectors)
163. Multiplexer Applications
164. Demultiplexers (Data Distributors)
165. More Troubleshooting
166. Magnitude Comparator
167. Code Converters
168. Data Busing
169. The 74ALS173/HC173 Tristate Register
170. Data Bus Operation
171. Decoders Using HDL
172. The HDL 7-Segment Decoder/Driver
173. Encoders Using HDL
174. HDL Multiplexers and Demultiplexers
175. HDL Magnitude Comparators
176. HDL Code Converters

CHAPTER 10: Digital System Projects Using HDL
177. Small-Project Management
178. Stepper Motor Driver Project
179. Keypad Encoder Project
180. Digital Clock Project
181. Frequency Counter Project

CHAPTER 11: Interfacing with the Analog World
182. Review of Digital Versus Analog
183. Digital-to-Analog Conversion
184. D/A-Converter Circuitry
185. DAC Specifications
186. An Integrated-Circuit DAC
187. DAC Applications
188. Troubleshooting DACs
189. Analog-to-Digital Conversion
190. Digital-Ramp ADC
191. Data Acquisition
192. Successive-Approximation ADC
193. Flash ADCs
194. Other A/D Conversion Methods
195. Digital Voltmeter
196. Sample-and-Hold Circuits
197. Multiplexing
198. Digital Storage Oscilloscope
199. Digital Signal Processing (DSP)

CHAPTER 12: Memory Devices
200. Memory Terminology
201. General Memory Operation
202. CPU-Memory Connections
203. Read-Only Memories
204. ROM Architecture
205. ROM Timing
206. Types of ROMs
207. Flash Memory
208. ROM Applications
209. Semiconductor RAM
210. RAM Architecture
211. Static RAM (SRAM)
212. Dynamic RAM (DRAM)
213. Dynamic RAM Structure and Operation
214. DRAM Read/Write Cycles
215. DRAM Refreshing
216. DRAM Technology
217. Expanding Word Size and Capacity
218. Special Memory Functions
219. Troubleshooting RAM Systems
220. Testing ROM

CHAPTER 13: Programmable Logic Device Architectures
221. Digital Systems Family Tree
222. Fundamentals of PLD Circuitry
223. PLD Architectures
224. The GAL 16V8 (Generic Array Logic)
225. The Altera EPM7128S CPLD
226. The Altera FLEX10K Family

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