FPGA based Implementation of Signal Processing Systems 1st Edition by Roger Woods, John Mcallister, Gaye Lightbody, Ying Yi ISBN 9780470030097 0470030097

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ISBN 10:   0470030097

ISBN 13: 9780470030097

Author: Roger Woods, John Mcallister, Gaye Lightbody, Ying Yi

Field programmable gate arrays (FPGAs) are an increasingly popular technology for implementing digital signal processing (DSP) systems. By allowing designers to create circuit architectures developed for the specific applications, high levels of performance can be achieved for many DSP applications providing considerable improvements over conventional microprocessor and dedicated DSP processor solutions. The book addresses the key issue in this process specifically, the methods and tools needed for the design, optimization and implementation of DSP systems in programmable FPGA hardware. It presents a review of the leading-edge techniques in this field, analyzing advanced DSP-based design flows for both signal flow graph- (SFG-) based and dataflow-based implementation, system on chip (SoC) aspects, and future trends and challenges for FPGAs. The automation of the techniques for component architectural synthesis, computational models, and the reduction of energy consumption to help improve FPGA performance, are given in detail.

Written from a system level design perspective and with a DSP focus, the authors present many practical application examples of complex DSP implementation, involving:

high-performance computing e.g. matrix operations such as matrix multiplication;

high-speed filtering including finite impulse response (FIR) filters and wave digital filters (WDFs);

adaptive filtering e.g. recursive least squares (RLS) filtering;

transforms such as the fast Fourier transform (FFT).

FPGA-based Implementation of Signal Processing Systems is an important reference for practising engineers and researchers working on the design and development of DSP systems for radio, telecommunication, information, audio-visual and security applications. Senior level electrical and computer engineering graduates taking courses in signal processing or digital signal processing shall also find this volume of interest.

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Table of contents: 

Chapter 1: Introduction to Field Programmable Gate Arrays
Introduction
A Short History of the Microchip
Influence of Programmability
Challenges of FPGAs
References

Chapter 2: DSP Fundamentals
Introduction
DSP System Basics
DSP System Definitions
DSP Transforms
Filter Structures
Adaptive Filtering
Basics of Adaptive Filtering
Conclusions
References

Chapter 3: Arithmetic Basics
Introduction
Number Systems
Fixed Point and Floating Point
Arithmetic Operations
Fixed Point versus Floating Point
Conclusions
References

Chapter 4: Technology Review
Introduction
Architecture and Programmability
DSP Functionality Characteristics
Processor Classification
Microprocessors
DSP Microprocessors (DSPμs)
Parallel Machines
Dedicated ASIC and FPGA Solutions
Conclusions
References

Chapter 5: Current FPGA Technologies
Introduction
Toward FPGAs
Altera FPGA Technologies
Xilinx FPGA Technologies
Lattice FPGA Families
Actel FPGA Technologies
Atmel FPGA Technologies
General Thoughts on FPGA Technologies
References

Chapter 6: Detailed FPGA Implementation Issues
Introduction
Various Forms of the LUT
Memory Availability
Fixed Coefficient Design Techniques
Distributed Arithmetic
Reduced Coefficient Multiplier
Final Statements
References

Chapter 7: Rapid DSP System Design Tools and Processes for FPGA
Introduction
The Evolution of FPGA System Design
Design Methodology Requirements for FPGA DSP
System Specification
IP Core Generation Tools for FPGA
System Level Design Tools for FPGA
Conclusion
References

Chapter 8: Architecture Derivation for FPGA Based DSP Systems
Introduction
DSP Algorithm Characteristics
DSP Algorithm Representations
Basics of Mapping DSP Systems onto FPGAs
Parallel Operation
Hardware Sharing
Application to FPGA
Conclusions
References

Chapter 9: The IRIS Behavioural Synthesis Tool
Introduction of Behavioural Synthesis Tools
IRIS Behavioural Synthesis Tool
IRIS Retiming
Hierarchical Design Methodology
Hardware Sharing Implementation (Scheduling Algorithm) for IRIS
Case Study: Adaptive Delayed Least Mean Squares Realization
Conclusions
References

Chapter 10: Complex DSP Core Design for FPGA
Motivation for Design for Reuse
Intellectual Property (IP) Cores
Evolution of IP Cores
Parameterizable (Soft) IP Cores
IP Core Integration
ADPCM IP Core Example
Current FPGA Based IP Cores
Summary
References

Chapter 11: Model Based Design for Heterogeneous FPGA
Introduction
Dataflow Modelling and Rapid Implementation for FPGA DSP Systems
Rapid Synthesis and Optimization of Embedded Software from DFGs
System Level Modelling for Heterogeneous Embedded DSP Systems
Pipelined Core Design of MADF Algorithms
System Level Design and Exploration of Dedicated Hardware Networks
Summary
References

Chapter 12: Adaptive Beamformer Example
Introduction to Adaptive Beamforming
Generic Design Process
Adaptive Beamforming Specification
Algorithm Development
Algorithm to Architecture
Efficient Architecture Design
Generic QR Architecture
Retiming the Generic Architecture
Parameterizable QR Architecture
Generic Control
Beamformer Design Example
Summary
References

Chapter 13: Low Power FPGA Implementation
Introduction
Sources of Power Consumption
Power Consumption Reduction Techniques
Voltage Scaling in FPGAs
Reduction in Switched Capacitance
Data Reordering
Fixed Coefficient Operation
Pipelining
Locality
Application to an FFT Implementation
Conclusions
References

Chapter 14: Final Statements
Introduction
Reconfigurable Systems
Memory Architectures
Support for Floating Point Arithmetic
Future Challenges for FPGAs
References

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Tags: Roger Woods, John Mcallister, Gaye Lightbody, Ying Yi, FPGA based, Signal Processing Systems